Nanoconduction, Inc. (Menlo Park, CA) spun out of NASA Ames Research Center, develops thermal interface materials for semiconductor devices. Nanoconduction earned U.S. Patent 7,656,027 for in-chip carbon nanotube structures in close proximity to the power generating semiconductor junctions that more efficiently conduct heat to the IC's outer surfaces. According to inventors Carlos Dangelo and Bala Padmakumar, the carbon nanotube structures are compatible with current semiconductor fabrication technology, provide significantly lower thermal resistances, and are low cost.
The method for fabricating a carbon nanotube heat conduction device in an integrated circuit includes the steps of: (1) fabricating at least one transistor in a silicon substrate, (2) depositing a first dielectric layer on the top surface of the transistor, (3) depositing a metal catalyst layer on the surface of the first dielectric layer, (4) depositing a second dielectric layer on the surface of the metal catalyst layer, (5) etching at least one cavity through the second dielectric layer to the top surface of the metal catalyst layer, the cavity being located above the transistor. In step (6) at least one carbon nanotube is grown within the cavity, the carbon nanotube extending from the top surface of the metal catalyst layer to at least the top horizontal surface of the second dielectric layer, and in step (7) a metallic, heat conducting layer is deposited on the top surface of the second dielectric layer, such that heat generated by the transistor is conducted from the top surface of the transistor to the metallic, heat conducting layer through the carbon nanotube.
Nanoconduction also developed a method for fabricating a heat conduction device in an integrated circuit die comprising the steps of (1) fabricating at least one transistor in a top surface of a silicon substrate, (2) cutting at least one cavity within the silicon substrate, the cavity extending through a back surface of the silicon substrate below the transistor, (3) depositing a catalyst layer within the cavity, and (4) growing a plurality of carbon nanotubes within the cavity, the carbon nanotubes extending from a bottom surface of the cavity to the back surface of the silicon substrate.
Another aspect of Nanoconduction’s invention involves a heat conducting device within an integrated circuit structure, comprising a heat conductive network extending from a top surface of an active device layer, through a plurality of interconnect levels, to a top surface of the integrated circuit structure. The heat conductive network comprises a plurality of heat conductive vias traversing the plurality of interconnect levels. The heat conductive vias are electrically isolated from metal conductors of the interconnect levels. Heat generated by active devices in the active device layer is conducted through the heat conductive network to the top surface of the integrated circuit structure.
Nanoconduction also developed a method for fabricating a heat conduction device in an integrated circuit die comprising the steps of (1) fabricating at least one transistor in a top surface of a silicon substrate, (2) cutting at least one cavity within the silicon substrate, the cavity extending through a back surface of the silicon substrate below the transistor, (3) depositing a catalyst layer within the cavity, and (4) growing a plurality of carbon nanotubes within the cavity, the carbon nanotubes extending from a bottom surface of the cavity to the back surface of the silicon substrate.
Another aspect of Nanoconduction’s invention involves a heat conducting device within an integrated circuit structure, comprising a heat conductive network extending from a top surface of an active device layer, through a plurality of interconnect levels, to a top surface of the integrated circuit structure. The heat conductive network comprises a plurality of heat conductive vias traversing the plurality of interconnect levels. The heat conductive vias are electrically isolated from metal conductors of the interconnect levels. Heat generated by active devices in the active device layer is conducted through the heat conductive network to the top surface of the integrated circuit structure.
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